Examples using the free development environment

Accellera examples (recommended starting point)

/pics/reading.pngOn the Accellera download page (external link) you can find the user's guide and the source code of many examples to download.
You should really start with this ones:
These examples can be used with the free modelling environment click  here to see how to set it up. Please also ensure you have gtkwave and unzip installed your the environment.
  • Copy the ZIP file to "C:\tools\msys64\home\<username>"
  • Start a Mingw64 command line of your modelling environment.
  • Enter following commands (this shows just one of the examples):
        unzip application_examples.zip
        cd application_examples/bask
           (you may select any other example directory there)
        export SYSTEMC_PATH
        export SYSTEMC_AMS_PATH
        export TARGET_ARCH
            (you may put these lines into a shell script for your convenience)
        make -j12
            (use the #CPUs you have)
        /mingw32/bin/gtkwave tr.vcd

Using SystemC-AMS and Python for post processing

This is the RC-lowpass example again we used for our first test compile in the installation description. This time we use Python to compile the example, run it and view the results using a plot window. It is just an example showing the idea how this works.
  • This is the RC low pass example, you can download the sc_main.cpp here.
  • And this is the python script, just put it in the same directory as the sc_main.cpp file and start it:
#!/usr/bin/env python

#   Copyright 2020 Carinthia University of Applied Sciences
#   All Rights Reserved Worldwide
#   Licensed under the Apache License, Version 2.0 (the
#   "License"); you may not use this file except in
#   compliance with the License.  You may obtain a copy of
#   the License at
#       http://www.apache.org/licenses/LICENSE-2.0
#   Unless required by applicable law or agreed to in
#   writing, software distributed under the License is
#   distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
#   CONDITIONS OF ANY KIND, either express or implied.  See
#   the License for the specific language governing
#   permissions and limitations under the License.

import subprocess
import numpy as np
import matplotlib
import matplotlib.pyplot as plt

def compile_model():
    compile_cmd = ['bash','-c','g++ sc_main.cpp -o sc_main.exe -I /opt/scams/include -L /opt/scams/lib-mingw64 -l systemc-ams -l systemc -l m']
    print ('Running : ' + str(compile_cmd));

def run_sim():
    run_cmd = ['./sc_main.exe']
    print ('Running : ' + str(run_cmd));

def tran_plot(t,sig1,sig2,tmin,tmax,ylabel,title):
    size = len(t)

    x = []
    y1 = []
    y2 = []
    for i in range(0, size):
        if (t[i]>=tmin) and (t[i]<=tmax):

    fig, ax = plt.subplots()
    ax.plot(x, y1, label='vin')
    ax.plot(x, y2, label='vout')
    ax.set(xlabel='time [s]', ylabel=ylabel, title=title)

dat = []
dat = np.loadtxt('tr.tab', comments='%', unpack=True)
tran_plot(dat[0],dat[1],dat[2],-1,99,'nodes [V]','LP filter')
  •  The Python code should be quite self-explanatory, although it is not perfect. But you get the idea, right? The result of this code will look like this:

Playing with diode modulators:


I set up an example using the free tools:
Spyder, Numpy, Pweave, lcapy
(here I tried the commercial waveform plugin "Impulse" I was not at all satisfied with - I explain here why...)



Further examples

(more to come soon)

SystemC-AMS Design Examples using Coside®

/pics/Logo_COSEDA.svgSee here (external link) how to obtain Coside®. Project sources following soon!

Some basic examples

Here I list some examples of using SystemC-AMS for some basic investigations. Please don't take it too serious, it is intended for exemplary use:


Playing with ELN elements:

I set up a COSIDE project with two libraries, which extensively use the upcoming PWL extension for ELN sources:
.) A OPAMP model library containing supply boundaries and a slew rate limiter, besides the classic DC gain and (3dB) bandwidth properties. Click on the images to open a larger version.
 .) A logic library to allow logic functions within a ELN cluster. Please note, this only makes sense for very small logic functionality needed. If you need more functionality within ELN, consider using TDF models for logic and embed them with ELN/TDF sinks and TDF/ELN sources.Furthermore, each two-port input gate require three PWL sources - from COSEDA I got the proposal to use a resistor network on the inputs and only one PWL on the output. Definitely something I am going to try out.
Click on the images to open a larger version.
Here you can find the documentation here.
Here you can download the project ZIP here, use the "import" function within COSIDE.
Note: use this project data at your own risk for educational use only. The files are (c) Carinthia University of Applied Sciences, all rights reserved. By clicking on the link above to download the ZIP file, you accept this terms.
You can check the non-linear capabilities of the extended SystemC-AMS proof-of-concept library - please note, this PWL ELN sources are not (yet) part of the IEEE 1666.1 standard.

Lecturing content

Here is the model we will implement in my "System Modelling and Verification - Analog" class, which is part of the Integrated Circuit and System Design program (external link) at the Carinthia University of Applied Sciences (external link). Please note, that the browse-able model shown there is incomplete, descriptions of many library cells were removed from the online version because of copyright reasons.

External sites

Here is a nice web page (external link) designing a PLL model in Coside®.