eln_pulse
Project Library Model Name Kind
eln_examples eln_logic eln_pulse Hierarchical Module

Parameters

Name Type Default Description
vdd double 1.0 logic supply [V]
delay_time double 0.0 delay time [s]
low_time double 0.5 pulse low period [s]
high_time double 0.5 pulse high period [s]
sampling_time sca_core::sca_time sc_core::SC_ZERO_TIME sampling time

Ports

Name Interface Type Description
vout sca_eln::sca_terminal description

Description

ELN configurable PULSE source

Long Description

ELN based pulse/clock generator

This gates allows keeping circuits completely in the ELN cluster, but use with care.

Logic function:

------        --------        -----    Vdd V   (level parameter)
      --------        --------         0 V

delay   low     high                   (time parameters)


Schematic

gnd tdf_o pulse wave = {0.0,1.0, p.delay_time,1.0, p.delay_time+p.low_time*0.001,0.0, p.delay_time+p.low_time,0.0, p.delay_time+p.low_time*1.001,1.0, p.delay_time+p.low_time+p.high_time-p.delay_time,1.0} repeat = true sampling_time = p.sampling_time t A PWL_SRC_TDF p n inp vpulse scale = p.vdd vdd = 1.0 delay_time = 0.0 low_time = 0.5 high_time = 0.5 sampling_time = sc_core::SC_ZERO_TIME vout pulse_stim vout